• VISHAL RATHORE Department of Electrical Engineering, NIT Jamshedpur, Jharkhand, India
  • KRISHNA B. YADAV Department of Electrical Engineering, NIT Jamshedpur, Jharkh,nd India


Multilevel inverter, Pulse width modulation, Harmonic distortion, Six-phase induction motor


This paper presents an implementation of a five-level cascaded H-bridge multilevel inverter (CHBMLI) fed six-phase induction motor (SPIM) for high-performance drive applications. The three-phase induction motor is modified to operate as SPIM to increase the reliability and enhance the performance of the motor. To maintain the speed of SPIM at a predefined value, fine-tuning of proportional-integral-derivative (PID) controlling parameters accomplished with closed-loop volts/Hertz control is proposed. Added to that, a phase disposition (PD) Pulse width modulation (PWM) technique and a low pass filter (LPF) are designed to get rid of the undesirable harmonics present in the output waveform of current and voltage. Matlab/Simulink platform is used to model the proposed topology. Simulation and experimental results show that the proposed PWM technique-based CHBMLI mitigates the current and voltage harmonics to 1.7 % and 7.20 %, respectively, and enhances the overall performance of the SPIM, which can be further employed for high-power industrial applications.


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Électrotechnique et électroénergétique / Electrical and Power Engineering